HEF4094BT/CD4094

提供HEF4094BT/CD4094中文资料_价格_PDF数据手册_引脚图

产品描述

HEF4094BT/CD4094 是一个8阶段的串行移位寄存器。它有一个存储锁存器关联的模拟阶段,用于将从串行输入到并行缓冲的3态输出QP0到QP 7之间的数据排序。并行输出可以直接连接到公共总线上。

The CD4094 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions. The data in

each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (OE) signal is HIGH.

Two serial outputs (QS1 and QS2) are available for cascading a number of CD4094 devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next negative going clock edge. This is used for cascading CD4094 devices when the clock has a slow rise time.

It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.

其主要特点如下:

● Wide supply voltage range from 3V to 15V

● Fully static operation

● 5V, 10V, and 15V parametric ratings

● Standardized symmetrical output characteristics

● Specified from -40℃ to +105℃

● Packaging information: DIP16/SOP16/TSSOP16

基础参数

逻辑电路的归属系列:4000B

逻辑类型:移位寄存器

输出类型:三态

功能:串行至并行, 串行

工作电压:3V~15V

静态电流(最大值): 20uA

不同 V,最大 CL 时的最大传播延迟: 190ns@15V,50pF

低电平输出电流(IOL): 6.8mA

高电平输出电流(IOH): 6.8mA

逻辑电平-高: 3.5V~11V

逻辑电平-低: 1.5V~4V

工作温度: -40℃~+105℃

尺寸最大值

交流参数

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功能框图

逻辑符号

功能框图

逻辑框图

定时框图

参考报价

深圳市灵星芯微电子科技有限公司以低本高质的服务精神屹立于电子行业20多年

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页面更新:2024-03-31

标签:框图   电平   科技有限公司   最大值   逻辑   阶段   参数   类型   功能   数据

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